1 /******************************************************************************
3 * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File
6 *----------------------------------------------------------------------------
8 * Copyright (C) 2009 ARM Limited. All rights reserved.
10 * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
11 * processor based microcontrollers. This file can be freely distributed
12 * within development tools that are supporting such ARM based processors.
14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
17 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
18 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
20 ******************************************************************************/
27 /* define compiler specific symbols */
28 #if defined ( __CC_ARM )
29 #define __ASM __asm /*!< asm keyword for armcc */
30 #define __INLINE __inline /*!< inline keyword for armcc */
32 #elif defined ( __ICCARM__ )
33 #define __ASM __asm /*!< asm keyword for iarcc */
34 #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */
36 #elif defined ( __GNUC__ )
37 #define __ASM __asm /*!< asm keyword for gcc */
38 #define __INLINE inline /*!< inline keyword for gcc */
40 #elif defined ( __TASKING__ )
41 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
42 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
51 * @brief Return the Process Stack Pointer
54 * @return uint32_t ProcessStackPointer
56 * Return the actual process stack pointer
58 __ASM uint32_t __get_PSP(void)
65 * @brief Set the Process Stack Pointer
67 * @param uint32_t Process Stack Pointer
70 * Assign the value ProcessStackPointer to the MSP
71 * (process stack pointer) Cortex processor register
73 __ASM void __set_PSP(uint32_t topOfProcStack)
80 * @brief Return the Main Stack Pointer
83 * @return uint32_t Main Stack Pointer
85 * Return the current value of the MSP (main stack pointer)
86 * Cortex processor register
88 __ASM uint32_t __get_MSP(void)
95 * @brief Set the Main Stack Pointer
97 * @param uint32_t Main Stack Pointer
100 * Assign the value mainStackPointer to the MSP
101 * (main stack pointer) Cortex processor register
103 __ASM void __set_MSP(uint32_t mainStackPointer)
110 * @brief Reverse byte order in unsigned short value
112 * @param uint16_t value to reverse
113 * @return uint32_t reversed value
115 * Reverse byte order in unsigned short value
117 __ASM uint32_t __REV16(uint16_t value)
124 * @brief Reverse byte order in signed short value with sign extension to integer
126 * @param int16_t value to reverse
127 * @return int32_t reversed value
129 * Reverse byte order in signed short value with sign extension to integer
131 __ASM int32_t __REVSH(int16_t value)
138 #if (__ARMCC_VERSION < 400000)
141 * @brief Remove the exclusive lock created by ldrex
146 * Removes the exclusive lock which is created by ldrex.
148 __ASM void __CLREX(void)
154 * @brief Return the Base Priority value
157 * @return uint32_t BasePriority
159 * Return the content of the base priority register
161 __ASM uint32_t __get_BASEPRI(void)
168 * @brief Set the Base Priority value
170 * @param uint32_t BasePriority
173 * Set the base priority register
175 __ASM void __set_BASEPRI(uint32_t basePri)
182 * @brief Return the Priority Mask value
185 * @return uint32_t PriMask
187 * Return the state of the priority mask bit from the priority mask
190 __ASM uint32_t __get_PRIMASK(void)
197 * @brief Set the Priority Mask value
199 * @param uint32_t PriMask
202 * Set the priority mask bit in the priority mask register
204 __ASM void __set_PRIMASK(uint32_t priMask)
211 * @brief Return the Fault Mask value
214 * @return uint32_t FaultMask
216 * Return the content of the fault mask register
218 __ASM uint32_t __get_FAULTMASK(void)
225 * @brief Set the Fault Mask value
227 * @param uint32_t faultMask value
230 * Set the fault mask register
232 __ASM void __set_FAULTMASK(uint32_t faultMask)
239 * @brief Return the Control Register value
242 * @return uint32_t Control value
244 * Return the content of the control register
246 __ASM uint32_t __get_CONTROL(void)
253 * @brief Set the Control Register value
255 * @param uint32_t Control value
258 * Set the control register
260 __ASM void __set_CONTROL(uint32_t control)
266 #endif /* __ARMCC_VERSION */
269 #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
270 #pragma diag_suppress=Pe940
273 * @brief Return the Process Stack Pointer
276 * @return uint32_t ProcessStackPointer
278 * Return the actual process stack pointer
280 uint32_t __get_PSP(void)
282 __ASM("mrs r0, psp");
287 * @brief Set the Process Stack Pointer
289 * @param uint32_t Process Stack Pointer
292 * Assign the value ProcessStackPointer to the MSP
293 * (process stack pointer) Cortex processor register
295 void __set_PSP(uint32_t topOfProcStack)
297 __ASM("msr psp, r0");
302 * @brief Return the Main Stack Pointer
305 * @return uint32_t Main Stack Pointer
307 * Return the current value of the MSP (main stack pointer)
308 * Cortex processor register
310 uint32_t __get_MSP(void)
312 __ASM("mrs r0, msp");
317 * @brief Set the Main Stack Pointer
319 * @param uint32_t Main Stack Pointer
322 * Assign the value mainStackPointer to the MSP
323 * (main stack pointer) Cortex processor register
325 void __set_MSP(uint32_t topOfMainStack)
327 __ASM("msr msp, r0");
332 * @brief Reverse byte order in unsigned short value
334 * @param uint16_t value to reverse
335 * @return uint32_t reversed value
337 * Reverse byte order in unsigned short value
339 uint32_t __REV16(uint16_t value)
341 __ASM("rev16 r0, r0");
346 * @brief Reverse bit order of value
348 * @param uint32_t value to reverse
349 * @return uint32_t reversed value
351 * Reverse bit order of value
353 uint32_t __RBIT(uint32_t value)
355 __ASM("rbit r0, r0");
360 * @brief LDR Exclusive
362 * @param uint8_t* address
363 * @return uint8_t value of (*address)
365 * Exclusive LDR command
367 uint8_t __LDREXB(uint8_t *addr)
369 __ASM("ldrexb r0, [r0]");
374 * @brief LDR Exclusive
376 * @param uint16_t* address
377 * @return uint16_t value of (*address)
379 * Exclusive LDR command
381 uint16_t __LDREXH(uint16_t *addr)
383 __ASM("ldrexh r0, [r0]");
388 * @brief LDR Exclusive
390 * @param uint32_t* address
391 * @return uint32_t value of (*address)
393 * Exclusive LDR command
395 uint32_t __LDREXW(uint32_t *addr)
397 __ASM("ldrex r0, [r0]");
402 * @brief STR Exclusive
404 * @param uint8_t *address
405 * @param uint8_t value to store
406 * @return uint32_t successful / failed
408 * Exclusive STR command
410 uint32_t __STREXB(uint8_t value, uint8_t *addr)
412 __ASM("strexb r0, r0, [r1]");
417 * @brief STR Exclusive
419 * @param uint16_t *address
420 * @param uint16_t value to store
421 * @return uint32_t successful / failed
423 * Exclusive STR command
425 uint32_t __STREXH(uint16_t value, uint16_t *addr)
427 __ASM("strexh r0, r0, [r1]");
432 * @brief STR Exclusive
434 * @param uint32_t *address
435 * @param uint32_t value to store
436 * @return uint32_t successful / failed
438 * Exclusive STR command
440 uint32_t __STREXW(uint32_t value, uint32_t *addr)
442 __ASM("strex r0, r0, [r1]");
446 #pragma diag_default=Pe940
449 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
452 * @brief Return the Process Stack Pointer
455 * @return uint32_t ProcessStackPointer
457 * Return the actual process stack pointer
459 uint32_t __get_PSP(void) __attribute__( ( naked ) );
460 uint32_t __get_PSP(void)
464 __ASM volatile ("MRS %0, psp\n\t"
466 "BX lr \n\t" : "=r" (result) );
472 * @brief Set the Process Stack Pointer
474 * @param uint32_t Process Stack Pointer
477 * Assign the value ProcessStackPointer to the MSP
478 * (process stack pointer) Cortex processor register
480 void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
481 void __set_PSP(uint32_t topOfProcStack)
483 __ASM volatile ("MSR psp, %0\n\t"
484 "BX lr \n\t" : : "r" (topOfProcStack) );
488 * @brief Return the Main Stack Pointer
491 * @return uint32_t Main Stack Pointer
493 * Return the current value of the MSP (main stack pointer)
494 * Cortex processor register
496 uint32_t __get_MSP(void) __attribute__( ( naked ) );
497 uint32_t __get_MSP(void)
501 __ASM volatile ("MRS %0, msp\n\t"
503 "BX lr \n\t" : "=r" (result) );
508 * @brief Set the Main Stack Pointer
510 * @param uint32_t Main Stack Pointer
513 * Assign the value mainStackPointer to the MSP
514 * (main stack pointer) Cortex processor register
516 void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
517 void __set_MSP(uint32_t topOfMainStack)
519 __ASM volatile ("MSR msp, %0\n\t"
520 "BX lr \n\t" : : "r" (topOfMainStack) );
524 * @brief Return the Base Priority value
527 * @return uint32_t BasePriority
529 * Return the content of the base priority register
531 uint32_t __get_BASEPRI(void)
535 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
540 * @brief Set the Base Priority value
542 * @param uint32_t BasePriority
545 * Set the base priority register
547 void __set_BASEPRI(uint32_t value)
549 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
553 * @brief Return the Priority Mask value
556 * @return uint32_t PriMask
558 * Return the state of the priority mask bit from the priority mask
561 uint32_t __get_PRIMASK(void)
565 __ASM volatile ("MRS %0, primask" : "=r" (result) );
570 * @brief Set the Priority Mask value
572 * @param uint32_t PriMask
575 * Set the priority mask bit in the priority mask register
577 void __set_PRIMASK(uint32_t priMask)
579 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
583 * @brief Return the Fault Mask value
586 * @return uint32_t FaultMask
588 * Return the content of the fault mask register
590 uint32_t __get_FAULTMASK(void)
594 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
599 * @brief Set the Fault Mask value
601 * @param uint32_t faultMask value
604 * Set the fault mask register
606 void __set_FAULTMASK(uint32_t faultMask)
608 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
612 * @brief Reverse byte order in integer value
614 * @param uint32_t value to reverse
615 * @return uint32_t reversed value
617 * Reverse byte order in integer value
619 uint32_t __REV(uint32_t value)
623 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
628 * @brief Reverse byte order in unsigned short value
630 * @param uint16_t value to reverse
631 * @return uint32_t reversed value
633 * Reverse byte order in unsigned short value
635 uint32_t __REV16(uint16_t value)
639 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
644 * @brief Reverse byte order in signed short value with sign extension to integer
646 * @param int32_t value to reverse
647 * @return int32_t reversed value
649 * Reverse byte order in signed short value with sign extension to integer
651 int32_t __REVSH(int16_t value)
655 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
660 * @brief Reverse bit order of value
662 * @param uint32_t value to reverse
663 * @return uint32_t reversed value
665 * Reverse bit order of value
667 uint32_t __RBIT(uint32_t value)
671 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
676 * @brief LDR Exclusive
678 * @param uint8_t* address
679 * @return uint8_t value of (*address)
681 * Exclusive LDR command
683 uint8_t __LDREXB(uint8_t *addr)
687 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
692 * @brief LDR Exclusive
694 * @param uint16_t* address
695 * @return uint16_t value of (*address)
697 * Exclusive LDR command
699 uint16_t __LDREXH(uint16_t *addr)
703 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
708 * @brief LDR Exclusive
710 * @param uint32_t* address
711 * @return uint32_t value of (*address)
713 * Exclusive LDR command
715 uint32_t __LDREXW(uint32_t *addr)
719 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
724 * @brief STR Exclusive
726 * @param uint8_t *address
727 * @param uint8_t value to store
728 * @return uint32_t successful / failed
730 * Exclusive STR command
732 uint32_t __STREXB(uint8_t value, uint8_t *addr)
736 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
741 * @brief STR Exclusive
743 * @param uint16_t *address
744 * @param uint16_t value to store
745 * @return uint32_t successful / failed
747 * Exclusive STR command
749 uint32_t __STREXH(uint16_t value, uint16_t *addr)
753 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
758 * @brief STR Exclusive
760 * @param uint32_t *address
761 * @param uint32_t value to store
762 * @return uint32_t successful / failed
764 * Exclusive STR command
766 uint32_t __STREXW(uint32_t value, uint32_t *addr)
770 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
775 * @brief Return the Control Register value
778 * @return uint32_t Control value
780 * Return the content of the control register
782 uint32_t __get_CONTROL(void)
786 __ASM volatile ("MRS %0, control" : "=r" (result) );
791 * @brief Set the Control Register value
793 * @param uint32_t Control value
796 * Set the control register
798 void __set_CONTROL(uint32_t control)
800 __ASM volatile ("MSR control, %0" : : "r" (control) );
803 #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
804 /* TASKING carm specific functions */
807 * The CMSIS functions have been implemented as intrinsics in the compiler.
808 * Please use "carm -?i" to get an up to date list of all instrinsics,
809 * Including the CMSIS ones.