1 /******************************************************************************
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3 * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File
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5 * @date: 22. May 2009
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6 *----------------------------------------------------------------------------
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8 * Copyright (C) 2009 ARM Limited. All rights reserved.
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10 * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
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11 * processor based microcontrollers. This file can be freely distributed
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12 * within development tools that are supporting such ARM based processors.
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14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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17 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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18 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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20 ******************************************************************************/
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27 /* define compiler specific symbols */
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28 #if defined ( __CC_ARM )
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29 #define __ASM __asm /*!< asm keyword for armcc */
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30 #define __INLINE __inline /*!< inline keyword for armcc */
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32 #elif defined ( __ICCARM__ )
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33 #define __ASM __asm /*!< asm keyword for iarcc */
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34 #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */
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36 #elif defined ( __GNUC__ )
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37 #define __ASM __asm /*!< asm keyword for gcc */
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38 #define __INLINE inline /*!< inline keyword for gcc */
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40 #elif defined ( __TASKING__ )
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41 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
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42 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
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48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
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51 * @brief Return the Process Stack Pointer
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54 * @return uint32_t ProcessStackPointer
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56 * Return the actual process stack pointer
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58 __ASM uint32_t __get_PSP(void)
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65 * @brief Set the Process Stack Pointer
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67 * @param uint32_t Process Stack Pointer
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70 * Assign the value ProcessStackPointer to the MSP
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71 * (process stack pointer) Cortex processor register
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73 __ASM void __set_PSP(uint32_t topOfProcStack)
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80 * @brief Return the Main Stack Pointer
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83 * @return uint32_t Main Stack Pointer
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85 * Return the current value of the MSP (main stack pointer)
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86 * Cortex processor register
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88 __ASM uint32_t __get_MSP(void)
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95 * @brief Set the Main Stack Pointer
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97 * @param uint32_t Main Stack Pointer
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100 * Assign the value mainStackPointer to the MSP
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101 * (main stack pointer) Cortex processor register
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103 __ASM void __set_MSP(uint32_t mainStackPointer)
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110 * @brief Reverse byte order in unsigned short value
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112 * @param uint16_t value to reverse
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113 * @return uint32_t reversed value
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115 * Reverse byte order in unsigned short value
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117 __ASM uint32_t __REV16(uint16_t value)
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124 * @brief Reverse byte order in signed short value with sign extension to integer
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126 * @param int16_t value to reverse
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127 * @return int32_t reversed value
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129 * Reverse byte order in signed short value with sign extension to integer
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131 __ASM int32_t __REVSH(int16_t value)
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138 #if (__ARMCC_VERSION < 400000)
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141 * @brief Remove the exclusive lock created by ldrex
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146 * Removes the exclusive lock which is created by ldrex.
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148 __ASM void __CLREX(void)
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154 * @brief Return the Base Priority value
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157 * @return uint32_t BasePriority
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159 * Return the content of the base priority register
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161 __ASM uint32_t __get_BASEPRI(void)
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168 * @brief Set the Base Priority value
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170 * @param uint32_t BasePriority
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173 * Set the base priority register
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175 __ASM void __set_BASEPRI(uint32_t basePri)
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182 * @brief Return the Priority Mask value
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185 * @return uint32_t PriMask
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187 * Return the state of the priority mask bit from the priority mask
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190 __ASM uint32_t __get_PRIMASK(void)
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197 * @brief Set the Priority Mask value
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199 * @param uint32_t PriMask
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202 * Set the priority mask bit in the priority mask register
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204 __ASM void __set_PRIMASK(uint32_t priMask)
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211 * @brief Return the Fault Mask value
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214 * @return uint32_t FaultMask
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216 * Return the content of the fault mask register
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218 __ASM uint32_t __get_FAULTMASK(void)
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225 * @brief Set the Fault Mask value
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227 * @param uint32_t faultMask value
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230 * Set the fault mask register
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232 __ASM void __set_FAULTMASK(uint32_t faultMask)
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239 * @brief Return the Control Register value
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242 * @return uint32_t Control value
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244 * Return the content of the control register
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246 __ASM uint32_t __get_CONTROL(void)
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253 * @brief Set the Control Register value
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255 * @param uint32_t Control value
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258 * Set the control register
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260 __ASM void __set_CONTROL(uint32_t control)
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266 #endif /* __ARMCC_VERSION */
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269 #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
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270 #pragma diag_suppress=Pe940
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273 * @brief Return the Process Stack Pointer
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276 * @return uint32_t ProcessStackPointer
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278 * Return the actual process stack pointer
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280 uint32_t __get_PSP(void)
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282 __ASM("mrs r0, psp");
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287 * @brief Set the Process Stack Pointer
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289 * @param uint32_t Process Stack Pointer
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292 * Assign the value ProcessStackPointer to the MSP
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293 * (process stack pointer) Cortex processor register
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295 void __set_PSP(uint32_t topOfProcStack)
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297 __ASM("msr psp, r0");
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302 * @brief Return the Main Stack Pointer
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305 * @return uint32_t Main Stack Pointer
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307 * Return the current value of the MSP (main stack pointer)
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308 * Cortex processor register
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310 uint32_t __get_MSP(void)
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312 __ASM("mrs r0, msp");
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317 * @brief Set the Main Stack Pointer
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319 * @param uint32_t Main Stack Pointer
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322 * Assign the value mainStackPointer to the MSP
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323 * (main stack pointer) Cortex processor register
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325 void __set_MSP(uint32_t topOfMainStack)
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327 __ASM("msr msp, r0");
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332 * @brief Reverse byte order in unsigned short value
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334 * @param uint16_t value to reverse
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335 * @return uint32_t reversed value
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337 * Reverse byte order in unsigned short value
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339 uint32_t __REV16(uint16_t value)
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341 __ASM("rev16 r0, r0");
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346 * @brief Reverse bit order of value
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348 * @param uint32_t value to reverse
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349 * @return uint32_t reversed value
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351 * Reverse bit order of value
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353 uint32_t __RBIT(uint32_t value)
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355 __ASM("rbit r0, r0");
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360 * @brief LDR Exclusive
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362 * @param uint8_t* address
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363 * @return uint8_t value of (*address)
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365 * Exclusive LDR command
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367 uint8_t __LDREXB(uint8_t *addr)
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369 __ASM("ldrexb r0, [r0]");
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374 * @brief LDR Exclusive
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376 * @param uint16_t* address
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377 * @return uint16_t value of (*address)
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379 * Exclusive LDR command
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381 uint16_t __LDREXH(uint16_t *addr)
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383 __ASM("ldrexh r0, [r0]");
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388 * @brief LDR Exclusive
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390 * @param uint32_t* address
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391 * @return uint32_t value of (*address)
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393 * Exclusive LDR command
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395 uint32_t __LDREXW(uint32_t *addr)
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397 __ASM("ldrex r0, [r0]");
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402 * @brief STR Exclusive
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404 * @param uint8_t *address
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405 * @param uint8_t value to store
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406 * @return uint32_t successful / failed
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408 * Exclusive STR command
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410 uint32_t __STREXB(uint8_t value, uint8_t *addr)
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412 __ASM("strexb r0, r0, [r1]");
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417 * @brief STR Exclusive
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419 * @param uint16_t *address
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420 * @param uint16_t value to store
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421 * @return uint32_t successful / failed
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423 * Exclusive STR command
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425 uint32_t __STREXH(uint16_t value, uint16_t *addr)
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427 __ASM("strexh r0, r0, [r1]");
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432 * @brief STR Exclusive
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434 * @param uint32_t *address
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435 * @param uint32_t value to store
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436 * @return uint32_t successful / failed
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438 * Exclusive STR command
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440 uint32_t __STREXW(uint32_t value, uint32_t *addr)
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442 __ASM("strex r0, r0, [r1]");
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446 #pragma diag_default=Pe940
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449 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
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452 * @brief Return the Process Stack Pointer
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455 * @return uint32_t ProcessStackPointer
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457 * Return the actual process stack pointer
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459 uint32_t __get_PSP(void) __attribute__( ( naked ) );
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460 uint32_t __get_PSP(void)
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464 __ASM volatile ("MRS %0, psp\n\t"
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466 "BX lr \n\t" : "=r" (result) );
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472 * @brief Set the Process Stack Pointer
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474 * @param uint32_t Process Stack Pointer
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477 * Assign the value ProcessStackPointer to the MSP
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478 * (process stack pointer) Cortex processor register
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480 void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
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481 void __set_PSP(uint32_t topOfProcStack)
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483 __ASM volatile ("MSR psp, %0\n\t"
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484 "BX lr \n\t" : : "r" (topOfProcStack) );
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488 * @brief Return the Main Stack Pointer
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491 * @return uint32_t Main Stack Pointer
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493 * Return the current value of the MSP (main stack pointer)
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494 * Cortex processor register
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496 uint32_t __get_MSP(void) __attribute__( ( naked ) );
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497 uint32_t __get_MSP(void)
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501 __ASM volatile ("MRS %0, msp\n\t"
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503 "BX lr \n\t" : "=r" (result) );
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508 * @brief Set the Main Stack Pointer
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510 * @param uint32_t Main Stack Pointer
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513 * Assign the value mainStackPointer to the MSP
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514 * (main stack pointer) Cortex processor register
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516 void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
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517 void __set_MSP(uint32_t topOfMainStack)
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519 __ASM volatile ("MSR msp, %0\n\t"
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520 "BX lr \n\t" : : "r" (topOfMainStack) );
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524 * @brief Return the Base Priority value
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527 * @return uint32_t BasePriority
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529 * Return the content of the base priority register
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531 uint32_t __get_BASEPRI(void)
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535 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
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540 * @brief Set the Base Priority value
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542 * @param uint32_t BasePriority
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545 * Set the base priority register
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547 void __set_BASEPRI(uint32_t value)
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549 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
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553 * @brief Return the Priority Mask value
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556 * @return uint32_t PriMask
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558 * Return the state of the priority mask bit from the priority mask
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561 uint32_t __get_PRIMASK(void)
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565 __ASM volatile ("MRS %0, primask" : "=r" (result) );
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570 * @brief Set the Priority Mask value
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572 * @param uint32_t PriMask
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575 * Set the priority mask bit in the priority mask register
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577 void __set_PRIMASK(uint32_t priMask)
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579 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
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583 * @brief Return the Fault Mask value
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586 * @return uint32_t FaultMask
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588 * Return the content of the fault mask register
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590 uint32_t __get_FAULTMASK(void)
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594 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
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599 * @brief Set the Fault Mask value
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601 * @param uint32_t faultMask value
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604 * Set the fault mask register
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606 void __set_FAULTMASK(uint32_t faultMask)
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608 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
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612 * @brief Reverse byte order in integer value
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614 * @param uint32_t value to reverse
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615 * @return uint32_t reversed value
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617 * Reverse byte order in integer value
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619 uint32_t __REV(uint32_t value)
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623 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
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628 * @brief Reverse byte order in unsigned short value
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630 * @param uint16_t value to reverse
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631 * @return uint32_t reversed value
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633 * Reverse byte order in unsigned short value
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635 uint32_t __REV16(uint16_t value)
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639 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
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644 * @brief Reverse byte order in signed short value with sign extension to integer
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646 * @param int32_t value to reverse
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647 * @return int32_t reversed value
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649 * Reverse byte order in signed short value with sign extension to integer
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651 int32_t __REVSH(int16_t value)
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655 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
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660 * @brief Reverse bit order of value
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662 * @param uint32_t value to reverse
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663 * @return uint32_t reversed value
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665 * Reverse bit order of value
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667 uint32_t __RBIT(uint32_t value)
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671 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
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676 * @brief LDR Exclusive
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678 * @param uint8_t* address
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679 * @return uint8_t value of (*address)
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681 * Exclusive LDR command
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683 uint8_t __LDREXB(uint8_t *addr)
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687 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
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692 * @brief LDR Exclusive
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694 * @param uint16_t* address
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695 * @return uint16_t value of (*address)
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697 * Exclusive LDR command
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699 uint16_t __LDREXH(uint16_t *addr)
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703 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
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708 * @brief LDR Exclusive
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710 * @param uint32_t* address
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711 * @return uint32_t value of (*address)
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713 * Exclusive LDR command
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715 uint32_t __LDREXW(uint32_t *addr)
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719 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
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724 * @brief STR Exclusive
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726 * @param uint8_t *address
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727 * @param uint8_t value to store
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728 * @return uint32_t successful / failed
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730 * Exclusive STR command
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732 uint32_t __STREXB(uint8_t value, uint8_t *addr)
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736 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
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741 * @brief STR Exclusive
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743 * @param uint16_t *address
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744 * @param uint16_t value to store
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745 * @return uint32_t successful / failed
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747 * Exclusive STR command
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749 uint32_t __STREXH(uint16_t value, uint16_t *addr)
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753 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
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758 * @brief STR Exclusive
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760 * @param uint32_t *address
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761 * @param uint32_t value to store
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762 * @return uint32_t successful / failed
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764 * Exclusive STR command
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766 uint32_t __STREXW(uint32_t value, uint32_t *addr)
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770 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
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775 * @brief Return the Control Register value
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778 * @return uint32_t Control value
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780 * Return the content of the control register
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782 uint32_t __get_CONTROL(void)
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786 __ASM volatile ("MRS %0, control" : "=r" (result) );
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791 * @brief Set the Control Register value
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793 * @param uint32_t Control value
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796 * Set the control register
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798 void __set_CONTROL(uint32_t control)
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800 __ASM volatile ("MSR control, %0" : : "r" (control) );
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803 #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
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804 /* TASKING carm specific functions */
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807 * The CMSIS functions have been implemented as intrinsics in the compiler.
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808 * Please use "carm -?i" to get an up to date list of all instrinsics,
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809 * Including the CMSIS ones.
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